A Classi cation of Design Steps and their Veri cation
نویسنده
چکیده
Hardware design using the hardware description language VHDL has to consider three independent property scales that in uence the design process from an abstract level to the gate level, namely the design view, the timing aspect, and the value representation. Considering this classi cation, a systematic way for design steps and their veri cation with special emphasis on VHDL is presented in this paper.
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